A semiconductor vision beyond the factory floor

📌 Summary:

• Context: The Union Cabinet approved Phase 2 of the India Semiconductor Mission, with an outlay of Rs 1,27,500 crore announced earlier this week

• Core argument: The policy marks a strategic shift from merely building semiconductor factories (fabs) to building a full innovation ecosystem — integrating chip design, equipment, materials, intellectual property and advanced research into one coherent industrial strategy

• Why design matters: Chip design is where most of the industry's value is created; countries without cutting-edge fabrication plants can still occupy pivotal positions in global supply chains through chip architecture, verification, software and IP

• Mechanism of the policy shift: fiscal support for fabrication units is being reduced and redirected towards companies making raw materials, speciality chemicals and industrial gases needed to produce chips; subsidies of up to 75 per cent on chip design underline the premium placed on R&D

• Mature-node strategy defended: India's immediate goal is an ecosystem for 28 nm or larger chips. Though modest against South Korea, Taiwan and China (proficient in sub-10 nm), mature-node chips account for around 70 per cent of global semiconductor demand — electronics, smartphones, power grids and medical devices do not need very small chips. The policy therefore plays to India's comparative advantage

• Caution on complacency: the global chip market has been repeatedly disrupted in the last five years — Covid exposed supply-chain deficiencies, and tech rivalries keep the value chain precarious. Every major power (US, China, South Korea, Taiwan, Netherlands, Japan) uses semiconductor capability as strategic leverage. India's goal of 7nm and 2nm chips in five years is significant though largely aspirational today

• India's specific vulnerabilities beyond money: even momentary power interruptions can destroy entire production batches; logistics must function with clockwork precision; environmental clearances must be rigorous yet predictable; large numbers of skilled technicians must be available

• Existing advantage: Indian engineers already design semiconductors for leading global firms, and global companies have set up design centres in Bengaluru, Hyderabad, Pune and Noida

• Solution proposed: translate this design advantage into world-class manufacturing capacity through a judicious mix of market forces and state support; like Taiwan, South Korea and the US, the Indian government must act as an enabler and build academia-industry linkages

🎯 UPSC Relevance: GS3 — Indian Economy (industrial policy, manufacturing, PLI-type incentives, comparative advantage) and Science & Technology (indigenisation, R&D ecosystem). Also GS2/IR for semiconductor geopolitics and supply-chain resilience.

📝 Prelims Facts:

• India Semiconductor Mission Phase 2 outlay: Rs 1,27,500 crore

• Subsidy of up to 75 per cent available on chip design under the new phase

• India's immediate target: mature node chips of 28 nm or larger; stated five-year aspiration: 7nm and 2nm chips

• Mature-node chips account for roughly 70 per cent of global semiconductor demand

• Major semiconductor design centres in India: Bengaluru, Hyderabad, Pune, Noida

🔑 Key Term: Mature node — Semiconductor process technology of 28 nm or larger. Though less advanced than sub-10 nm leading-edge nodes, mature nodes power most everyday electronics, automobiles, power grids and medical devices, and constitute the bulk of global chip demand.